1. Field of the Invention
The present invention relates generally to semiconductor devices and particularly to semiconductor devices including a charge pump circuit and a clock driver.
2. Description of the Background Art
In flash memory, a non-volatile memory capable of electrical erasure and rewriting, word and bit lines are set to different potential depending on each mode of operation. For example, a word line in a read is set to 5.5V and in a programming operation is set to 9.7V, and in data erasure is set to −9.2V. A bit line in a read is set to 0.7V and in a programming operation is set to 5.1V. Furthermore, a well potential in a read is set to 0V and in a programming operation is set to −0.9V. Accordingly to generate from a single external power supply voltage (for example of 1.8V) a voltage required in each mode of operation a variety of pump circuits are provided.
A proposed, conventional pump circuit generating a negative voltage resets a constituent P channel MOS transistor's gate electrode in potential when the pump circuit is inactive. The second and succeeding pump operations can also be performed without reduced rates of generating the negative voltage (see Japanese Patent Laying-Open No. 2002-032987 for example).
Furthermore, there is also another conventional pump circuit proposed to share a pump module operating in standby and active cycles. This can eliminate the necessity of separate circuits for the standby and active cycles, respectively, and a reduced circuit area can be achieved (see Japanese Patent Laying-Open No. 07-111093 for example).
In recent years there is a demand for a semiconductor device having a further reduced area. Conventional semiconductor devices, however, have not yet achieved a sufficiently reduced pump circuit area.